| 000 | 00457nam a22001697a 4500 | ||
|---|---|---|---|
| 999 |
_c5120 _d5118 |
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| 005 | 20210909151814.0 | ||
| 008 | 160701b xxu||||| |||| 00| 0 eng d | ||
| 020 | _a81-7808-558-5 | ||
| 041 | _aeng | ||
| 082 |
_b20740 _a003 |
||
| 100 |
_aValamanchilli, Sudhakar _94020 |
||
| 245 |
_aINTRODUCTORY VHDL _b(from simulation to synthesis) _cSudhakar Yalamanchili |
||
| 260 |
_bPearson _c2002 |
||
| 300 | _a395 | ||
| 650 |
_aDiploma Engineering _9817 |
||
| 942 | _cBK | ||