000 00463nam a22001697a 4500
005 20180131124433.0
008 160702b xxu||||| |||| 00| 0 eng d
020 _a978-81-317-0633-6
041 _aeng
082 _b20871
_a003.3
100 _aYalamanchilli, Sudhakar
_94019
245 _aIntroductory VHDL
_bfrom simulation to synthisis
_cSudhakar Yalamanchili
260 _bPearson
_c2006
300 _a395p,
650 _aDiploma Engineering
_9817
942 _cBK
999 _c5146
_d5144